发明名称 RECEIVING DEVICE AND MODULATION METHOD
摘要 <p>PROBLEM TO BE SOLVED: To achieve reduction in a circuit scale and reduction in power consumption when signals on a plurality of channels are simultaneously received in a receiving device.SOLUTION: A calculation range control unit 106 sets a range of frequencies where Fourier transformation calculation is performed and gives instructions on the range to a frequency component detector 105. The frequency component detector 105 performs fast Fourier transformation of a digital signal output from an ADC 104 in the range on which the calculation range control unit 106 has given instructions, and detects a plurality of frequency components (FFT signal) of the digital signal. A channel shift unit 107 distributes the FFT signal output from the frequency component detector 105 to data from a channel 1 to a channel N, and outputs it to corresponding demodulation units 108.</p>
申请公布号 JP2015159466(A) 申请公布日期 2015.09.03
申请号 JP20140033938 申请日期 2014.02.25
申请人 PANASONIC CORP 发明人 KOSAKA MASAHIKO
分类号 H04L27/14 主分类号 H04L27/14
代理机构 代理人
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