发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 An input signal having a high level or a low level is input to a pad. A first protection element includes a first transistor configured as an N-channel MOSFET designed so as to withstand ESD. A second protection element includes a second transistor configured as a P-channel MOSFET designed so as to withstand ESD. A capacitance element is connected to a second line, and forms an RC filter together with a filter resistor. The capacitance element includes at least one from among a third transistor having the same device structure as that of the first transistor and a fourth transistor having the same device structure as that of the second transistor.
申请公布号 US2015249079(A1) 申请公布日期 2015.09.03
申请号 US201514707510 申请日期 2015.05.08
申请人 ROHM CO., LTD. 发明人 ARAI Kenji
分类号 H01L27/02;H01L23/522;H01L23/50;H03K5/1252 主分类号 H01L27/02
代理机构 代理人
主权项 1. A semiconductor integrated circuit comprising: a pad connected to receive an input signal having a high level or a low level; an internal circuit; a power supply line; a ground line; a filter resistor; a protection resistor; a first line that connects a first terminal of the filter resistor and the pad; a second line that connects a second terminal of the filter resistor and a first terminal of the protection resistor; a third line that connects a second terminal of the protection resistor and the internal circuit; a second protection element including a second transistor configured as a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), wherein the second transistor has its drain connected to the first line, and has its source, its gate, and its back gate connected to the power supply line; and a capacitance element coupled to the second line so as to form an RC filter together with the filter resistor, wherein the capacitance element includes a fourth transistor, and the fourth transistor is configured as a P-channel MOSFET having the same device structure as that of the second transistor.
地址 Kyoto JP