发明名称 位相補間回路および半導体装置
摘要 <p><P>PROBLEM TO BE SOLVED: To improve the linearity of phase interpolation. <P>SOLUTION: A phase interpolation circuit includes: a first drive circuit adjusted in driving force by a first control signal to generate a first current corresponding to the driving force set by the first control signal in accordance with a first clock; a second drive circuit adjusted in driving force by a second control signal to generate a second current corresponding to the driving force set by the second control signal in accordance with a second clock delayed in phase from the first clock; and an adjustment section for generating a third current for canceling the second current when the levels of the first clock and the second clock are different from each other. The driving force of the first drive circuit and the driving force of the second drive circuit are set such that the sum of the first current and the second current is constant. <P>COPYRIGHT: (C)2013,JPO&INPIT</p>
申请公布号 JP5772188(B2) 申请公布日期 2015.09.02
申请号 JP20110099633 申请日期 2011.04.27
申请人 发明人
分类号 H03K5/00 主分类号 H03K5/00
代理机构 代理人
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