发明名称 |
MULTI-CORE PROCESSOR SYSTEM, CONTROL PROGRAM, AND CONTROL METHOD |
摘要 |
<p>When process A-1-1 is assigned to CPU#0 and CPU#1, a scheduler (111) obtains the priority of process A-1-1 and the number of accesses by each of process assigned to CPUs. The scheduler (111) determines whether the priority of process A-1-1 is high. The priority of process A-1-1 is high since process A-1-1 is a doacross process that has a dependency between iterations and thus accesses a bus frequently. If the scheduler (111) determines the priority of process A-1-1 is high, the scheduler (111) determines an access ratio based on the obtained number of accesses, and notifies an arbitration circuit (102) of the access ratio. The arbitration circuit (102) arbitrates accesses from CPU#0 to CPU#7 according to weighted round robin based on the notified access ratio.</p> |
申请公布号 |
EP2551776(A4) |
申请公布日期 |
2015.09.02 |
申请号 |
EP20100848404 |
申请日期 |
2010.03.25 |
申请人 |
FUJITSU LIMITED |
发明人 |
YAMAUCHI, HIROMASA;YAMASHITA, KOICHIRO;MIYAZAKI, KIYOSHI;IKEDA, HITOSHI |
分类号 |
G06F13/18;G06F9/50;G06F12/00;G06F13/362;G06F15/167 |
主分类号 |
G06F13/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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