发明名称 シフトレジスタ
摘要 <p>A shift register includes unit circuits connected in multiple stages, each of the unit circuits includes: a final buffer unit having an output transistor; and a signal A generating unit which supplies a first signal to a gate of the output transistor, the signal A generating unit includes: a capacitor; a transistor which switches conduction and non-conduction between the gate the output transistor and one of electrodes of the capacitor by a voltage from a clock signal line; a transistor which switches conduction and non-conduction between the other of the electrodes of the capacitor and the clock signal line by a voltage from an input line; and a transistor having a gate connected to a fixed power supply line, and which switches conduction and non-conduction between the one electrode of the first capacitor and the input line.</p>
申请公布号 JP5774011(B2) 申请公布日期 2015.09.02
申请号 JP20120532808 申请日期 2011.12.28
申请人 发明人
分类号 H03K23/44;G11C19/00;G11C19/28 主分类号 H03K23/44
代理机构 代理人
主权项
地址