Method and apparatus for LDO and distributed LDO transient response accelerator

摘要

A transient response accelerated (TRA) low dropout (LDO) regulator has an error amplifier having a feedback input, and a reference input configured to receive a reference voltage, and an output that controls a pass gate. The pass gate output voltage is applied to the feedback input. A transient response accelerator (TRA) circuit detects a rapid voltage drop on the pass gate output and, in response, applies a pulse control that rapidly lowers the resistance of the pass gate.

主权项

1. A transient response accelerated low dropout (LDO) regulator, comprising:
an error amplifier having a feedback input, an error output, and a reference input configured to receive a reference voltage; a pass gate having a control gate coupled to the error output, a pass gate input configured to receive a supply voltage, and a pass gate output, wherein the pass gate output is coupled to the feedback input; and a transient response accelerator (TRA) circuit coupled to the pass gate output and configured to apply, in response to a voltage drop on the pass gate output, a TRA boost to the control gate, wherein the TRA comprises:
a pass gate kick transistor having a drain coupled to the control gate of the pass gate, and having a gate; anda voltage change triggered control circuit having an input coupled by a coupling capacitor to the pass gate output and having a kick output that is coupled to the gate of the pass gate kick transistor,wherein the voltage change triggered control circuit is configured to apply through the kick output, in response to a voltage drop on the pass gate output, a boost voltage to the gate of the pass gate kick transistor, at a magnitude corresponding to a rate of the voltage drop, andwherein the pass gate kick transistor is configured to pull a voltage on the control gate of the pass gate, in response to the boost voltage, by a magnitude based, at least in part, on the boost voltage,wherein the voltage change triggered control circuit includes:
a bias current source having an input configured for coupling to a power rail and having an output;a bias control resistor coupled at one end to the output of the bias current source;an NMOS transistor having a drain coupled to another end of the bias control resistor and to the output of the voltage change triggered control circuit, a gate coupled to the input of the voltage change triggered control circuit, and a source configured for coupling to a reference rail; anda self-bias resistor coupling the drain of the NMOS transistor to the source of the NMOS transistor,wherein the bias current source feeds a bias current through the bias control resistor and the NMOS transistor.