Method, apparatus, and system for energy efficiency and energy conservation including energy efficient processor thermal throttling using deep power down mode

摘要

Embodiments of the invention relate to energy efficient and conserving thermal throttling of electronic device processors using a zero voltage processor state. For example, a processor die may include a power control unit (PCU), and an execution unit having power gates and a thermal sensor. The PCU is attached to the thermal sensor to determine if a temperature of the execution unit has increased to greater than an upper threshold, such as while the execution unit is processing data in an active processor power state. The PCU is also attached to the power gates so that upon such detection, it can change the active processor power state to a zero processor power state to reduce the temperature of the execution unit. When the sensor detects that the temperature has decreased to less than a lower threshold, the PCU can change the processor power state back to the active state.

主权项

1. A method comprising:
detecting that a temperature of a processor is greater than a first threshold, while the processor is performing processing of data in an active processor power state; based on detecting, changing a processor power state of the processor from the active processor power state to a zero processor power state by power gating the processor; after changing a processor power state of the processor from an active processor power state to the zero processor power state, then detecting that a temperature of the processor is less than a second threshold, wherein the second threshold is less than the first threshold; and based on detecting that the temperature of the processor is less than the second threshold, changing the processor power state from the zero processor power state to an active processor power state to cause the processor to process data, wherein the first threshold is based on a thermal design of a device into which the processor is installed; and wherein the second threshold is based on causing a time period of the zero processor power state to have a proportional relationship with a time period of the active processor power state.