发明名称 Adaptive reference tuning for endurance enhancement of non-volatile memories
摘要 A wear leveling technique is employed in a memory device so that the cycling history of a memory block is represented by the cycling history of a representative memory cell or a small number of representative memory cells. A control logic block tracks the cycling history of the one or more representative memory cells. A table tabulating the predicted shift in an optimal value for a reference variable for a sensing circuit as a function of cycling history is provided within the memory device. Prior to sensing a memory cell, the control logic block checks the total number of cycling in the one or more representative memory cells and adjusts the value for the reference variable in the sensing circuit, thereby providing an optimal value for the reference variable in the sensing circuit for each sensing cycle of the memory device.
申请公布号 US9122404(B2) 申请公布日期 2015.09.01
申请号 US201313842375 申请日期 2013.03.15
申请人 International Business Machines Corporation 发明人 Dai Bing;Lam Chung H.;Li Jing
分类号 G06F3/06 主分类号 G06F3/06
代理机构 Scully, Scott, Murphy & Presser, P.C. 代理人 Scully, Scott, Murphy & Presser, P.C. ;Percello, Esq. Louis J.
主权项 1. A memory device comprising: a plurality of memory cells; a sensing circuit for determining a state of a selected memory cell among said plurality of memory cells, said state determining including measuring a physical quantity employed in detecting a bit value of the selected memory cell, said memory cell subject to plural write cycles applied to that memory cell; and a memory controller comprising at least a control logic block and a look-up table, the look-up table for encoding a relationship between a value of a variable reference parameter value associated with measuring said physical quantity at said cell and a number of subjected said write cycles to said plurality of memory cells, and wherein said control logic block counts said plural write cycles to memory cell locations and determines an estimated number of cycling for said plurality of memory cells by counting a total number of cycling for at least one memory cell, wherein for said cell memory state determining, said look-up table returns a value for said variable reference parameter to said sensing circuit for each value of said total number of cycling provided by said control logic block, and said sensing circuit comparing a value of a measured quantity from said selected memory cell with the variable reference parameter in the determining of the cell state.
地址 Armonk NY US