Integrated circuits and methods of forming integrated circuits with interlayer dielectric protection

摘要

Integrated circuits and methods of forming integrated circuits are provided herein. In an embodiment, a method of forming an integrated circuit includes providing a base substrate having an embedded electrical contact disposed therein. An interlayer dielectric is formed overlying the base substrate, and a recess is etched through the interlayer dielectric over the embedded electrical contact. A protecting liner is formed in the recess and over an exposed surface of the embedded electrical contact in the recess. The protecting liner includes at least two liner layers that have materially different etch rates in different etchants. A portion of the protecting liner is removed over the surface of the embedded electrical contact to again expose the surface of the embedded electrical contact in the recess. An embedded electrical interconnect is formed in the recess. The embedded electrical interconnect overlies the protecting liner on sides of the recess.

主权项

1. A method of forming an integrated circuit, the method comprising:
providing a base substrate having an embedded electrical contact disposed therein; forming an interlayer dielectric overlying the base substrate; etching a recess through the interlayer dielectric over the embedded electrical contact with a surface of the embedded electrical contact exposed in the recess; forming a protecting liner in the recess and over the exposed surface of the embedded electrical contact in the recess, the protecting liner comprising at least two liner layers having materially different etch rates in different etchants; removing a portion of the protecting liner over the surface of the embedded electrical contact to again expose the surface of the embedded electrical contact in the recess; forming an embedded electrical interconnect in the recess, the embedded electrical interconnect overlying the protecting liner on sides of the recess.