LSI designing apparatus, LSI designing method, and program

摘要

An apparatus and method that improve design efficiency when designing an LSI. A selector module generating section inputs IP connection information describing input/output flows of signals between IPs included in an LSI to be designed, analyzes the inputted IP connection information, and generates a selector module of a selector that matches the input/output flows of signals between IPs described in the IP connection information. A macro module generating section generates a macro module in which relationships between the selector and function blocks are indicated, using the selector module generated by the selector module generating section.

主权项

1. An LSIC (Large Scale Integrated Circuit) designing apparatus comprising:
circuitry configured to:
input input/output flow information describing input/output flows of signals between function blocks included in an LSIC to be designed, wherein the input/output flows of signals are described in a format of a relational expression indicating a connection of the signals between the function blocks;analyze the inputted input/output flow information;correlate two or more function blocks described in the input/output flow information which output signals of a same type, to one function block that inputs the signals;generate a selector module of a selector that matches the input/output flows of signals between the correlated function blocks;generate a control register for the generated selector module;input CPU (Central Processing Unit) bus interface information;generate a CPU bus interface based on the inputted CPU bus interface information;generate a macro module including the selector module and a function block connected to outputs of the selector module, for accessing the control register for the selector module via the CPU bus interface; andgenerate input/output flow information describing the input/output flow of a signal between the macro module and a function block connecting the signal to the macro module, based on the input/output flow information describing input/output flows of signals between the function blocks.