发明名称 Switching scheme for ISI mitigation in data converters
摘要 Embodiments of the present disclosure may provide a switching scheme for tri-level unit elements with ISI mitigation. A tri-level unit element may include a first and second current source and a plurality of switches arranged to form three circuit branches between the first and the second current source. The first circuit branch may include two switches connected in parallel between the first current source and a first output terminal and two switches connected in parallel between the second current source and the first output terminal. The second circuit branch may include two switches connected in parallel between the first current source and a second output terminal and two switches connected in parallel between the second current source and the second output terminal. The third circuit branch may include switches to couple the first current source and the second current source to a dump node.
申请公布号 US9124283(B2) 申请公布日期 2015.09.01
申请号 US201414486918 申请日期 2014.09.15
申请人 ANALOG DEVICES, INC. 发明人 Bandyopadhyay Abhishek;Baginski Paul A.
分类号 H03M1/66;H03K17/06;H03M1/06;H03K17/16;H03M1/00;H03M1/08;H03M1/74 主分类号 H03M1/66
代理机构 Kenyon & Kenyon LLP 代理人 Kenyon & Kenyon LLP
主权项 1. A method of mitigating inter-symbol interference in a tri-level digital to analog converter (DAC), comprising: receiving, at the tri-level DAC, a digital data signal; converting the digital data signal into an analog signal in at least one tri-level unit element by switching within the tri-level unit element based on the digital data signal, wherein the inter-symbol interference generated by the conversion is independent of the digital data signal; and outputting the analog signal.
地址 Norwood MA US
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