发明名称 Insulating gate field effect transistor device and method for providing the same
摘要 An insulating gate field effect transistor (IGFET) device includes a semiconductor body and a gate oxide. The semiconductor body includes a first well region doped with a first type of dopant and a second well region that is doped with an oppositely charged second type of dopant and is located within the first well region. The gate oxide includes an outer section and an interior section having different thickness dimensions. The outer section is disposed over the first well region and the second well region of the semiconductor body. The interior section is disposed over a junction gate field effect transistor region of the semiconductor body. The semiconductor body is configured to form a conductive channel through the second well region and the junction gate field effect transistor region when a gate signal is applied to a gate contact disposed on the gate oxide.
申请公布号 US9123798(B2) 申请公布日期 2015.09.01
申请号 US201213712188 申请日期 2012.12.12
申请人 General Electric Company 发明人 Arthur Stephen Daley;Matocha Kevin Sean;Rao Ramakrishna;Losee Peter;Bolotnikov Alexander Viktorovich
分类号 H01L29/66;H01L29/78;H01L29/423;H01L29/16 主分类号 H01L29/66
代理机构 代理人 McCarthy Robert M.
主权项 1. An insulating gate field effect transistor (IGFET) device comprising: a silicon carbide containing semiconductor body conductively coupled with a source contact and a drain contact, the semiconductor body including a first well region comprising a first volume of the semiconductor body that is disposed at a first side of the semiconductor body and that is doped with a first type of dopant, the semiconductor body including a second well region comprising a second volume of the semiconductor body that is disposed at the first side of the semiconductor body and that is doped with an oppositely charged second type of dopant, the second well region disposed within the first well region; and a gate oxide coupled with the semiconductor body and with a gate contact, the gate oxide including an outer section and an interior section having different thickness dimensions, the outer section disposed over the first well region and the second well region of the semiconductor body, the interior section disposed over a junction gate field effect transistor region of the semiconductor body, wherein the semiconductor body is configured to form a conductive channel from the source contact to the drain contact through the second well region and the junction gate field effect transistor region when a gate signal is applied to the gate contact.
地址 Niskayuna NY US