Pipelined data relocation and improved chip architectures

摘要

The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.

主权项

1. A non-volatile memory system, comprising:
a controller circuit chip including a plurality of data buffers; and a memory circuit chip including a non-volatile data storage section and one or more data registers, wherein the controller is operable to perform a data checking operation on data in a first of said data buffers while concurrently and independently transferring data between another of said data buffers and one of said data registers.