Audio signal processing circuit for reducing zero crossing distortion and method thereof

摘要

An audio signal processing circuit includes an encoding circuit, a first audio conversion circuit, and a second audio conversion circuit. The encoding circuit receives pulse coded modulation signals and generates a first audio signal and a second audio signal accordingly. The first audio conversion circuit generates a first pulse width modulation (PWM) signal according to consecutive values of the first audio signal for configuring a first power stage circuit. The second audio conversion circuit generates a second PWM signal according to consecutive values of the second audio signal for configuring a second power stage circuit. The pulse width of the first PWM signal is configured to be substantially equal to the pulse width of the second PWM signal, and the pulse edges of the first PWM signal and the second PWM signal are configured to be separated by a predetermined time interval to mute the audio signal processing circuit.

主权项

1. An audio signal processing circuit, configured to operably configure an audio output device through a first power stage circuit and a second power stage circuit, comprising:
an encoding circuit, configured to operably receive a pulse coded modulation signal and to operably generate a first audio signal and a second audio signal according to the pulse coded modulation signal; a first audio conversion circuit, coupled with the encoding circuit, configured to operably generate a first pulse width modulation (PWM) signal to configure the first power stage circuit according to a first encoded value and a second encoded value of the first audio signal; and a second audio conversion circuit, coupled with the encoding circuit, configured to operably generate a second PWM signal to configure the second power stage circuit according to a third encoded value of the second audio signal, a fourth encoded value of the second audio signal and a displacement value; wherein the first encoded value and the second encoded value are consecutive in the first audio signal; the third encoded value, the fourth encoded value are consecutive in the second audio signal; when the first encoded value is equal to the third encoded value, and the second encoded value is equal to the fourth encoded value, a pulse width of a pulse of the first PWM signal is equal to a pulse width of a pulse of the second PWM signal, and an edge of the pulse of the first PWM signal and an edge of the pulse of the second PWM signal is separated by a predetermined time interval; wherein the second audio conversion circuit generates a first part of the pulse of the second PWM signal according to a difference of the third encoded value and the displacement value, and generates a second part of the pulse of the second PWM signal according to a sum of the fourth encoded value and the displacement value.