| 发明名称 |
SRAM write-assisted operation with V<sub>DD</sub>-to-V<sub>CS </sub>level shifting |
| 摘要 |
An electronic circuit and a method for driving data writes to an SRAM bit cell in an electronic circuit. The electronic circuit translates a first write signal in a lower voltage domain to a second write signal in a higher voltage domain. Based, at least in part, on the second write signal, the electronic circuit controls a discharge of a voltage of a data write line to a ground voltage level. The electronic circuit provides a negative voltage boost to the data write line after the voltage of the data write line has been discharged to reach or exceed a threshold value relative to the ground voltage level. |
| 申请公布号 |
US9123439(B2) |
申请公布日期 |
2015.09.01 |
| 申请号 |
US201314087006 |
申请日期 |
2013.11.22 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Pilo Harold |
| 分类号 |
G11C11/00;G11C11/419;G11C11/412;G11C5/14 |
主分类号 |
G11C11/00 |
| 代理机构 |
|
代理人 |
Darrow Stephen;Cain David |
| 主权项 |
1. A method of driving data writes to an SRAM bit cell in an electronic circuit, the method comprising:
translating, by an electronic circuit, a first write signal in a lower voltage domain to a second write signal in a higher voltage domain; controlling, by the electronic circuit, a discharge of a voltage of a data write line to a ground voltage level, wherein control of the discharge is based, at least in part, on the second write signal; and providing, by the electronic circuit, a negative voltage boost to the data write line after the voltage of the data write line has been discharged to reach or exceed a threshold value relative to the ground voltage level. |
| 地址 |
Armonk NY US |
