Plasma etching method

摘要

A plasma etching method forms a tapered recess portion in a wide-gap semiconductor substrate. The method includes forming on the substrate K an etching film having an etching speed higher than that of the substrate K, and forming a mask M having an opening on the high-speed etching film. The substrate K with the etching film and the mask is then placed on a platen and heated to a temperature equal to or higher than 200 ° C., a plasma is generated from an etching gas supplied into a processing chamber, and a bias potential is applied to the platen to etch substrate.

主权项

1. A plasma etching method of plasma etching a wide-gap semiconductor substrate having at least a wide-gap semiconductor layer and placed on a platen arranged in a processing chamber using a plasma generated from a reactive etching gas, comprising:
a deposition step of forming a high speed etching film directly on a surface of the wide-gap semiconductor layer, the high speed etching film comprising a component which is etched at a higher speed than a component of the wide-gap semiconductor layer by reactive species generated by generating the plasma from the reactive etching gas, a mask forming step of forming a mask having an opening on the high speed etching film formed on the surface of the wide-gap semiconductor substrate; and an etching step of placing the wide-gap semiconductor substrate on the platen arranged in the processing chamber, heating the wide-gap semiconductor substrate to a temperature equal to or higher than 200 ° C., and supplying the reactive etching gas into the processing chamber to generate the plasma and applying a bias potential to the platen on which the wide-gap semiconductor substrate is placed, thereby etching, through the opening, the high speed etching film and the wide-gap semiconductor layer by the plasma generated from the reactive etching gas, the etching step of etching the high speed etching film through the opening to expose the wide-gap semiconductor layer and then etching the wide-gap semiconductor layer while further etching the high speed etching film to expose a portion located under the mask of the wide-gap semiconductor layer, thereby forming a tapered etching structure in the wide-gap semiconductor layer.