Electrostatic discharge protection circuit and semiconductor circuit device

摘要

The invention provides an electrostatic protection circuit that is effective in absorbing static electricity that is continuously input. The electrostatic protection circuit includes a circuit constituting a latch and a static electricity absorption circuit. When static electricity is input, the static electricity absorption circuit maintains its on state for a while at an output held by the latch circuit, and absorbs static electricity that is continuously input. When the static electricity has been absorbed, the output of the latch is inverted so as to turn off the static electricity absorption circuit, and the operation of absorbing static electricity ends. At this point in time, normal operation serving as an input terminal is performed.

主权项

1. An electrostatic discharge protection circuit comprising:
a first line having a first potential; a second line having a second potential that is different from the first potential; a trigger circuit connected between the first line and the second line; and a discharge circuit including a field effect transistor that is connected between the first line and the second line, whose gate is directly or indirectly connected to a predetermined connection node of the trigger circuit, and that conducts electricity by a change in a potential of the gate, wherein the trigger circuit includes a first circuit and a second circuit that are connected in parallel, the first circuit includes: a first impedance element on the first line side and a capacitor element on the second line side that are connected in series between the first line and the second line; and a first transistor of first conductivity type that is connected in series to the first impedance element and is connected in parallel to the capacitor element, the second circuit includes: a first transistor of second conductivity type on the first line side and a second impedance element on the second line side that are connected in series between the first line and the second line, a gate of the first transistor of second conductivity type is connected to a first node located between the first impedance element and the capacitor element, a gate of the first transistor of first conductivity type is connected to a second node located between the first transistor of second conductivity type and the second impedance element, and the predetermined connection node is the first node or the second node, and wherein the capacitor element is constituted by a fourth transistor of first conductivity type whose is connected to the first node.