发明名称 Method of testing coherency of data storage in multi-processor shared memory system
摘要 A method of testing the coherency of data storage in a memory shared by multiple processor cores through core interconnects in a device under test (DUT) includes running test patterns including data transactions between the processor cores and the shared memory, and comparing the results of the data transactions with expected results. The test patterns include false sharing operations and irritator operations causing memory thrashing.
申请公布号 US9123444(B2) 申请公布日期 2015.09.01
申请号 US201414170652 申请日期 2014.02.03
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 Subramaniam Eswaran;Chouhan Vikas
分类号 G11C29/00;G11C29/10;G06F11/263;G06F11/22 主分类号 G11C29/00
代理机构 代理人 Bergere Charles
主权项 1. A method of testing coherency of data storage in a memory shared by a plurality of processor cores through core interconnects in a device under test (DUT), wherein the processor cores includes caches, the method comprising: running test patterns including data transactions between the processor cores and the shared memory; and comparing results of the data transactions with expected results, wherein the test patterns cause memory thrashing, wherein the data transactions include transactions with the caches as well as transactions with the shared memory, and wherein at least some of the test patterns include irritator operations having interrupts that modify cache lines or cache line states indirectly.
地址 Austin TX US