半导体封装件及其制法;SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

摘要

一种半导体封装件之制法，系先提供一承载件，其上设有相叠之第一与第二半导体元件，再形成支撑材以包覆该第一半导体元件之周围；之后形成封装层于该承载件上，再移除该承载件与该支撑材，使该封装层形成凹面区，且该第一半导体元件位于该凹面区中；最后形成绝缘材于该凹面区中，且形成线路层于该绝缘材上，并形成复数导电盲孔于该绝缘材中以电性连接该线路层、第一与第二半导体元件。藉由先移除该支撑材，再形成该绝缘材，能避免该支撑材覆盖该第二半导体元件而使导电盲孔无法对位之情况发生。本发明复提供该半导体封装件。; further forming an encapsulation layer on the carrier, and then removing the carrier and the support material, so that the encapsulation layer is formed a concave area, and the first semiconductor element is located in the concave area; finally forming an insulating material in the concave area, and forming an electrical trace layer on the insulating material, and forming a plurality of conductive blind holes in the insulating material so as to be electrically connected to the electric trace layer, the first and the second semiconductor elements. First, removing the support material, and then forming the insulating material, enabling the support material to address the conductive blind hole misalignment. This invention further provides a semiconductor package.