APPARATUSES AND METHODS FOR SELECTIVE ROW REFRESHES

摘要

Apparatuses and methods for selective row refreshes are disclosed herein. An example apparatus may include a refresh control circuit. The refresh control circuit may be configured to receive a target address associated with a target plurality of memory cells from an address bus. The refresh control circuit may further be configured to provide a proximate address to the address bus responsive, at least in part, to determining that a number of refresh operations have occurred. In some examples, a plurality of memory cells associated with the proximate address may be a plurality of memory cells adjacent the target plurality of memory cells.

主权项

1. An apparatus comprising:
a memory device configured to respond to an active command to activate a first plurality of memory cells designated by an external address, the memory device being further configured to respond to a refresh command to perform a refresh operation on a second plurality of memory cells proximate the first plurality of memory cells.