发明名称 RECEIVING DEVICE
摘要 A receiving device includes: a propagation path compensation unit that compensates a signal by using a propagation path characteristic; a power arithmetic section that arithmetically operates power of a signal; a first reciprocal processing section that performs reciprocal processing on power to output a signal; an error arithmetic section that arithmetically operates an error of the compensated signal; a subtractor that subtracts the signal output from the first reciprocal processing section from the error; a second reciprocal processing unit that performs reciprocal processing on the signal output from the subtractor to output a signal; a first multiplier that multiplies the power and the signal output from the second reciprocal processing unit together to output a signal; and a second multiplier that multiplies the signal compensated by the propagation path compensation unit and the signal output from the first multiplier together to output a signal to an adder.
申请公布号 US2015244490(A1) 申请公布日期 2015.08.27
申请号 US201414583179 申请日期 2014.12.25
申请人 FUJITSU LIMITED 发明人 Furudate Hideki
分类号 H04J11/00;H04L27/26;H04B7/08 主分类号 H04J11/00
代理机构 代理人
主权项 1. A receiving device, comprising: a plurality of antennas; each of a plurality of receiving circuits that receive signal via one of the plurality of antennas, respectively; and an adder that adds signals output from the plurality of receiving circuits, wherein each of the plurality of receiving circuits comprises: a Fourier transformation unit that transforms a signal into a frequency domain from a time domain; a propagation path estimation unit that estimates a propagation path characteristic based on a known signal in the signal in the frequency domain transformed by the Fourier transformation unit; a propagation path compensation unit that compensates the signal in the frequency domain transformed by the Fourier transformation unit by using the propagation path characteristic estimated by the propagation path estimation unit; a power arithmetic section that arithmetically operates power of the signal in the frequency domain transformed by the Fourier transformation unit; a first reciprocal processing section that performs reciprocal processing on the power arithmetically operated by the power arithmetic section to output a signal; an error arithmetic section that arithmetically operates an error of the signal compensated by the propagation path compensation unit; a subtractor that subtracts the signal output from the first reciprocal processing section from the error arithmetically operated by the error arithmetic section to output a signal; a second reciprocal processing unit that performs reciprocal processing on the signal output from the subtractor to output a signal; a first multiplier that multiplies the power arithmetically operated by the power arithmetic section and the signal output from the second reciprocal processing unit together to output a signal; and a second multiplier that multiplies the signal compensated by the propagation path compensation unit and the signal output from the first multiplier together to output a signal to the adder.
地址 Kawasaki-shi JP