发明名称 HYBRID WAFER DICING APPROACH USING TEMPORALLY-CONTROLLED LASER SCRIBING PROCESS AND PLASMA ETCH
摘要 Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a temporally-controlled laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The temporally-controlled laser scribing process involves scribing with a laser beam having a profile comprising a leading femto-second portion and a trailing lower-intensity, higher fluence portion. The method also involves plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.
申请公布号 US2015243559(A1) 申请公布日期 2015.08.27
申请号 US201414265139 申请日期 2014.04.29
申请人 Park Jungrae;Lei Wei-Sheng;Papanu James S.;Eaton Brad;Kumar Ajay 发明人 Park Jungrae;Lei Wei-Sheng;Papanu James S.;Eaton Brad;Kumar Ajay
分类号 H01L21/78;H01L21/3065;H01L21/67;H01L21/308 主分类号 H01L21/78
代理机构 代理人
主权项 1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising: forming a mask above the semiconductor wafer, the mask comprising a layer covering and protecting the integrated circuits; patterning the mask with a temporally-controlled laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits, wherein the temporally-controlled laser scribing process comprises scribing with a laser beam having a profile comprising a leading femto-second portion and a trailing portion, wherein the leading femto-second portion has a first intensity and a first fluence, the trailing portion has a second intensity and a second fluence, the second intensity is lower than the first intensity, and the first fluence is lower than the second fluence; and plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.
地址 Santa Clara CA US