发明名称 VERIFICATION OF DISTRIBUTED SYMMETRIC MULTI-PROCESSING SYSTEMS
摘要 A method, apparatus and product useful for verifying Distributed Symmetric Multi-Processing systems (DSMPs). The method comprising: determining one or more sub-systems of a DSMP, wherein each sub-system is a Symmetric Multi-Processing System (SMP) which comprises a shared memory and a set of processing entities that have the same access permissions to the shared memory; and verifying the DSMP using a verification tool designed to verify an SMP, wherein said verifying is performed by verifying each sub-system.
申请公布号 US2015242359(A1) 申请公布日期 2015.08.27
申请号 US201514709491 申请日期 2015.05.12
申请人 Goryachev Alex;Morad Ronny;Rabetti Tali;Shusterman Sergey 发明人 Goryachev Alex;Morad Ronny;Rabetti Tali;Shusterman Sergey
分类号 G06F15/173;G06F13/16;G06F9/50 主分类号 G06F15/173
代理机构 代理人
主权项 1. A computer-implemented method performed by a computer having a processor and memory, comprising: determining one or more sub-systems of a Distributed Symmetric Multi-Processing system (DSMP), wherein each sub-system is a Symmetric Multi-Processing System (SMP) which comprises a shared memory and a set of processing entities that have the same access permissions to the shared memory, wherein the DSMP comprises a plurality of SMP nodes, each comprising memory and one or more processing entities, wherein the one or more processing entities are divided into pivot and non-pivot processing entities, wherein a global portion of a memory of an SMP node is accessible by a portion of processing entities of different nodes, and wherein a private portion of the memory of the SMP node is configured to be accessed only by processing entities of the SMP node; wherein said determining comprises determining a sub-system that is based on a target SMP and on a logical SMP which is defined by several SMP nodes, the several SMP nodes include the target SMP, wherein the sub-system comprises: a portion of the private portion of the memory of the target SMP node; a portion of the global portion of the memory of the several SMP nodes; and at least one pivot processing entity of the target SMP node; and wherein said method further comprises verifying the DSMP using a verification tool designed to verify an SMP, wherein said verifying is performed by verifying each sub-system.
地址 Haifa IL