发明名称 RESISTIVE MEMORY CELL HAVING A REDUCED CONDUCTIVE PATH AREA
摘要 A method of forming a resistive memory cell (140), e.g., a CBRAM or ReRAM, may include forming a bottom electrode layer (102), oxidizing an exposed region of the bottom electrode layer to form an oxide region (110), removing a region of the bottom electrode layer proximate the oxide region, thereby forming a bottom electrode (102A) having a pointed tip region (114) adjacent the oxide region, and forming an electrolyte region (120A) and top electrode (122A) over at least a portion of the bottom electrode and oxide region, such that the electrolyte region is arranged between the pointed tip region of the bottom electrode and the top electrode, and provides a path for conductive filament or vacancy chain formation from the pointed tip region of the bottom electrode to the top electrode when a voltage bias is applied to the memory cell. A memory cell and memory cell array formed by such method are also disclosed.
申请公布号 WO2015126861(A1) 申请公布日期 2015.08.27
申请号 WO2015US16244 申请日期 2015.02.18
申请人 MICROCHIP TECHNOLOGY INCORPORATED 发明人 FEST, PAUL;WALLS, JAMES
分类号 H01L45/00 主分类号 H01L45/00
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