发明名称 SPLIT GATE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
摘要 The present invention relates to a split gate memory device which needs less number of treatment steps than a traditional baseline process, and to a method of fabricating the device. A symmetric word gate/select gate (SG) pair is formed around a sacrificing spacer. An SG structure formed as the result has a distinguishable non-planar upper surface. A spacer layer covering a select gate also follows the shape of the SG upper surface. A dielectric body arranged on a dielectric layer between gates and arranged between neighboring sidewalls of each memory gate and select gate insulates between the same.
申请公布号 KR20150097374(A) 申请公布日期 2015.08.26
申请号 KR20140163492 申请日期 2014.11.21
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 WU CHANG MING;WU WEI CHENG;LIU SHIH CHANG;CHUANG HARRY HAK LAY;TSAI CHIA SHIUNG
分类号 H01L27/115 主分类号 H01L27/115
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