发明名称 マルチスレッドプロセッサ
摘要 <p>PROBLEM TO BE SOLVED: To flexibly select a hardware thread while ensuring the minimum execution time of the hardware thread in a multi-thread processor.SOLUTION: A multi-thread processor includes: a plurality of hardware threads; a thread scheduler 19 that outputs a thread selection signal TSEL for selecting one of the hardware threads; a first selector that outputs an instruction generated by the hardware thread selected according to the thread selection signal TSEL; and an arithmetic circuit that executes the instruction. The thread scheduler 19 fixedly selects from among the hardware threads in a first execution period; and arbitrarily selects from among the hardware threads in a second execution period. The ratio between the first execution period and second execution period and the ratio of hardware threads executed in the first execution period are arbitrarily set by a management program that is executed by the arithmetic circuit.</p>
申请公布号 JP5770333(B2) 申请公布日期 2015.08.26
申请号 JP20140090595 申请日期 2014.04.24
申请人 发明人
分类号 G06F9/48;G06F9/46 主分类号 G06F9/48
代理机构 代理人
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