发明名称 Optimized Hardware Architecture and Method for ECC Point Addition Using Mixed Affine-Jacobian Coordinates over Short Weierstrass Curves
摘要 An optimized hardware architecture and method introducing a simple arithmetic processor that allows efficient implementation of an Elliptic Curve Cryptography point addition algorithm for mixed Affine-Jacobian coordinates. The optimized architecture additionally reduces the required storage for intermediate values.
申请公布号 EP2897041(A3) 申请公布日期 2015.08.26
申请号 EP20140198280 申请日期 2014.12.16
申请人 NXP B.V. 发明人 KNEZEVIC, MIROSLAV;NIKOV, VENTZISLAV
分类号 G06F7/72;H04L9/30 主分类号 G06F7/72
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