发明名称 スプリアス音響モード抑制を持つ集積回路及びその製造方法
摘要 <p>An integrated circuit (IC) apparatus includes a substrate having opposed first and second major sides and one or more edges defining an outer periphery of the substrate. The substrate may be a semiconductor material. The IC apparatus may further include one or more transducers situated on the first major side of the substrate; and an attenuation pattern formed in at least one of the second major side and one or more of the edges of the substrate.</p>
申请公布号 JP5770100(B2) 申请公布日期 2015.08.26
申请号 JP20110541666 申请日期 2009.12.07
申请人 发明人
分类号 H04R17/00;H04R31/00 主分类号 H04R17/00
代理机构 代理人
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