发明名称 Reconfigurable multi-chip processing platform for concurrent aggregation of wireless technologies
摘要 Methods, systems, and devices are described for providing a reconfigurable multi-chip WWAN processing platform on a communications device. The processing platform allows the device to access multiple WWANs and multiple WWAN technologies concurrently. A first multiplexer is communicatively coupled with a number of baseband processing chips. A first baseband processing chip is selectively coupled with a first transceiver and a first UICC module to establish a first connection. A second baseband processing chip is selectively coupled with a second transceiver and a second UICC module to establish a second connection operable concurrently with the first connection. A multiplexer controller performs a configurable search for available networks. One or more networks are selected. The controller selects a specific transceiver for each selected network based on the capabilities of the transceiver. Baseband processing chips that consume less power serve as proxies for other baseband processing chips that consume more power.
申请公布号 US9119222(B2) 申请公布日期 2015.08.25
申请号 US201113224057 申请日期 2011.09.01
申请人 QUALCOMM Incorporated 发明人 Krishnaswamy Dilip;Khan Irfan H.;Soliman Samir S.;Prasad Mohit K.
分类号 H04W88/06 主分类号 H04W88/06
代理机构 代理人 Jacobs Jeffrey D.
主权项 1. A communications device comprising: a plurality of baseband processing chips; a plurality of Universal Integrated Circuit Card (UICC) chips; and a first multiplexer, communicatively coupled with the plurality of baseband processing chips and configured to: selectively couple a first baseband processing chip with a first UICC module to establish a first connection;selectively couple a second baseband processing chip with a second UICC module to establish a second connection operable concurrently with the first connection; anddecouple the second baseband processing chip from the second UICC module and couple the first baseband processing chip to the second UICC module based on reduced consumption of power by the first baseband processing chip compared to a consumption of power by the second baseband processing chip.
地址 San Diego CA US