| 发明名称 | 3-D nonvolatile memory devices and methods of manufacturing the same | ||
| 摘要 | A three-dimensional (3-D) nonvolatile memory device includes a channel layer protruded from a substrate, a plurality of memory cells stacked along the channel layer, a source line coupled to the end of one side of the channel layer, a bit line coupled to the end of the other side of the channel layer, a first junction interposed between the end of one side of the channel layer and the source line and configured to have a P type impurity doped therein, and a second junction interposed between the end of the other side of the channel layer and the bit line and configured to have an N type impurity doped therein. | ||
| 申请公布号 | US9117700(B2) | 申请公布日期 | 2015.08.25 |
| 申请号 | US201213601531 | 申请日期 | 2012.08.31 |
| 申请人 | SK Hynix Inc. | 发明人 | Oh Sang Hyun;Aritome Seiichi;Lee Sang Bum |
| 分类号 | G11C5/02;H01L27/115;H01L21/822;G11C16/04;G11C16/14 | 主分类号 | G11C5/02 |
| 代理机构 | William Park & Associates Ltd. | 代理人 | William Park & Associates Ltd. |
| 主权项 | 1. A three-dimensional (3-D) nonvolatile memory device, comprising: a channel layer protruded from a substrate; a plurality of memory cells stacked along the channel layer; a source line coupled to an end of one side of the channel layer; a bit line coupled to an end of an other side of the channel layer; a first junction interposed between the end of one side of the channel layer and the source line and configured to have a P type impurity doped therein; and a second junction interposed between the end of the other side of the channel layer and the bit line and configured to have an N type impurity doped therein, wherein the first junction and the plurality of memory cells are disposed at different levels. | ||
| 地址 | Gyeonggi-do KR | ||