| 发明名称 | Fast exit from low-power state for bus protocol compatible device | ||
| 摘要 | A bus protocol compatible device, includes a transmitter having a first mode for providing a reference clock signal to an output, and a second mode for providing a training sequence to the output, and a power state controller for placing the transmitter in the first mode for a first period of time in response to a change in a link state, and in the second mode after an expiration of the first period of time. | ||
| 申请公布号 | US9117036(B2) | 申请公布日期 | 2015.08.25 |
| 申请号 | US201213627230 | 申请日期 | 2012.09.26 |
| 申请人 | ATI TECHNOLOGIES ULC | 发明人 | Tresidder Michael J. |
| 分类号 | G06F1/32;G06F13/42 | 主分类号 | G06F1/32 |
| 代理机构 | Polansky & Associates, P.L.L.C. | 代理人 | Polansky & Associates, P.L.L.C. ;Polansky Paul J. |
| 主权项 | 1. A bus protocol compatible device, comprising: a transmitter having a first mode for providing a reference clock signal to an output, and a second mode for providing a training sequence to said output; and a power state controller for placing said transmitter in said first mode for a first period of time in response to a change in a link state, and in said second mode after an expiration of said first period of time. | ||
| 地址 | Markham, Ontario CA | ||