发明名称 Métodos paera formar uma arquitetura de camada amortecedora em silício e estruturas formadas por meio destes
摘要 <p>Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a GaSb nucleation layer on a substrate, forming a Ga(Al)AsSb buffer layer on the GaSb nucleation layer, forming an In0.52Al0.48As bottom barrier layer on the Ga(Al)AsSb buffer layer, and forming a graded InxAl1-xAs layer on the In0.52Al0.48As bottom barrier layer thus enabling the fabrication of low defect, device grade InGaAs based quantum well structures.</p>
申请公布号 BRPI0909222(A2) 申请公布日期 2015.08.25
申请号 BR2009PI09222 申请日期 2009.06.08
申请人 INTEL CORPORATION 发明人 MANTU K. HUDAIT;PETER G. TOLCHINSKY;LOREN A. CHOW;DMITRI LOUBYCHEV;JOEL M. FASTENAU;AMY W.K. LIU
分类号 H01L21/20;H01L29/78 主分类号 H01L21/20
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