| 摘要 |
A data read/write system includes a system clock, a single port memory, a cache memory that is separate from the single port memory, and a controller coupled to an instruction pipeline. The controller receives, via the instruction pipeline, first data to write to an address of the single port memory, and further receives, via the instruction pipeline, a request to read second data from the single port memory. The controller stores the first data in the cache memory, and retrieves the second data from either the cache memory or the single port memory during one or more first clock cycles of the system clock. The controller copies the first data from the cache memory and stores the first data at the address in the single port memory during a second clock cycle of the system clock that is different than the one or more first clock cycles. |
| 主权项 |
1. A method comprising:
receiving, by a device, a write request; determining, by the device, a quantity of entries stored in a cache,
each of the quantity of entries including a dirty bit field,
the dirty bit field indicating whether data stored in a data field of a particular entry, of the quantity of entries, has been written back from the cache to a memory; transmitting, by the device and when a particular quantity of entries, of the quantity of entries including the dirty bit field that indicates that the data has not been written back from the cache to the memory, is greater than a threshold, a blocking notification; determining, by the device and based on the particular quantity of entries, if a cache flush is needed,
the cache flush resulting in an entry, of the quantity of entries, being written to the memory at an earliest clock cycle during which the memory is available and prior to writing the entry to the memory based on a first priority; selectively writing, by the device and based on the threshold and when a cache flush is not needed, the entry, of the quantity of entries, based on the received write request,
the selectively writing including:
writing, when the particular quantity is greater than the threshold, the entry to the memory based on the first priority,
the dirty bit field of the entry indicating that data stored in the data field of the entry has not been written back from the cache to the memory; orwriting, when the particular quantity is not greater than the threshold, the entry to the memory based on a second priority,
the second priority being less than the first priority; and changing, by the device and based on the selectively writing, a value associated with the dirty bit field of the entry. |
