发明名称 |
Stopping criteria for layered iterative error correction |
摘要 |
The present disclosure includes apparatuses and methods related to stopping criteria for layered iterative error correction. A number of methods can include receiving a codeword with an error correction circuit, iteratively error correcting the codeword with the error correction circuit including parity checking the codeword on a layer-by-layer basis and updating the codeword after each layer. Methods can include stopping the iterative error correction in response to a parity check being correct for a particular layer. |
申请公布号 |
US9116822(B2) |
申请公布日期 |
2015.08.25 |
申请号 |
US201313746768 |
申请日期 |
2013.01.22 |
申请人 |
Micron Technology, Inc. |
发明人 |
Kaynak Mustafa N.;Radke William H.;Khayat Patrick R.;Parthasarathy Sivagnanam |
分类号 |
G11C29/00;G06F11/10;H03M13/11;H03M13/29;H03M13/15 |
主分类号 |
G11C29/00 |
代理机构 |
Brooks, Cameron & Huebsch, PLLC |
代理人 |
Brooks, Cameron & Huebsch, PLLC |
主权项 |
1. A method, comprising:
receiving a codeword with an error correction circuit; iteratively error correcting the codeword with the error correction circuit including: parity checking the codeword on a layer-by-layer basis, wherein a layer comprises a fraction of an iteration; and updating the codeword after each layer; and
stopping the iterative error correction in response to a parity check being correct for a particular layer of a particular iteration without error correcting a next layer of the particular iteration, wherein the particular layer is a fraction other than a last fraction of the particular iteration, and wherein the parity check being correct for the particular layer comprises the parity check resulting in less than a threshold number of parity errors. |
地址 |
Boise ID US |