Kink poly structure for improving random single bit failure

摘要

A memory cell having a kinked polysilicon layer structure, or a polysilicon layer structure with a top portion being narrower than a bottom portion, may greatly reduce random single bit (RSB) failures and may improve high density plasma (HDP) oxide layer fill-in by reducing defects caused by various impurities and/or a polysilicon layer short path. A kinked polysilicon layer structure may also be applied to floating gate memory cells either at the floating gate structure or the control gate structure.

主权项

1. A memory cell, comprising:
a substrate; one or more stacks formed on the substrate, each stack comprising:
an oxide-nitride-oxide (ONO) layer formed on a top surface of the substrate; anda polysilicon layer formed on a top surface of the ONO layer; an oxide layer formed between the stacks; and a second polysilicon layer formed over the one or more stacks and the oxide layers formed between the stacks, a portion of the second polysilicon layer formed in contact with a top surface of the polysilicon layer of each of the stacks and another portion of the second polysilicon layer formed in contact with a top surface of each of the oxide layers; wherein the polysilicon layer of each of the stacks comprises side surfaces adjacent to the oxide layer between the stacks, and wherein a top portion of the side surfaces of the polysilicon layer is narrower than a bottom portion of the side surfaces of the polysilicon layer.