发明名称 Sense amplifier circuit and semiconductor memory device
摘要 To improve reading accuracy of a sense amplifier circuit and a semiconductor memory device. A sense amplifier circuit includes an N type FET which is a sensing transistor connected between a power supply and a ground via a data line that extends to a memory cell, a resistance element that is connected between a gate of the sensing transistor and the power supply, and a capacitance element that is connected between the gate of the sensing transistor and the ground.
申请公布号 US9117494(B2) 申请公布日期 2015.08.25
申请号 US201313774975 申请日期 2013.02.22
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Ozoe Hidetoshi;Tonda Yasuhiro;Taniguchi Kazutaka
分类号 G11C7/00;G11C7/06;G11C16/28;G11C16/04 主分类号 G11C7/00
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A sense amplifier circuit comprising: a sensing transistor that is connected between a first power supply and a second power supply through a memory cell connection line that extends to a memory cell; a resistance element that is connected between the first power supply and a control terminal of the sensing transistor; and a capacitance element that is connected between the second power supply and the control terminal of the sensing transistor, wherein a first capacity from the sensing transistor to the second power supply through the capacitance element is equal to a second capacity from the sensing transistor to the second power supply through the memory cell connection line.
地址 Kanagawa JP