发明名称 |
Cross-point diode arrays and methods of manufacturing cross-point diode arrays |
摘要 |
Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor material and a sacrificial cap on the semiconductor post. Source regions can be between columns of the pillars, and gate lines extend along a column of pillars and are spaced apart from corresponding source regions. Each gate line surrounds a portion of the semiconductor posts along a column of pillars. The sacrificial cap structure can be selectively removed to thereby form self-aligned openings that expose a top portion of corresponding semiconductor posts. Individual drain contacts formed in the self-aligned openings are electrically connected to corresponding semiconductor posts. |
申请公布号 |
US9117928(B2) |
申请公布日期 |
2015.08.25 |
申请号 |
US201414188536 |
申请日期 |
2014.02.24 |
申请人 |
Micron Technology, Inc. |
发明人 |
Zahurak John;Tang Sanh Dang;Sandhu Gurtej S. |
分类号 |
H01L21/336;H01L21/8234;H01L27/105;H01L27/24;H01L29/66;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
Perkins Coie LLP |
代理人 |
Perkins Coie LLP |
主权项 |
1. A method of forming an array of memory cells, comprising:
forming a plurality of pillars, wherein individual pillars have a semiconductor post formed of a semiconductor material and a sacrificial cap on the semiconductor post; forming source regions between columns of the pillars; forming a plurality of gate lines, wherein individual gate lines extend along a corresponding column of pillars and are spaced apart from corresponding source regions, and wherein each gate line surrounds a portion of the semiconductor posts along a corresponding column of pillars; forming self-aligned openings that expose a top portion of corresponding semiconductor posts by selectively removing the sacrificial caps without forming a mask having a pattern of openings corresponding to the pattern of the self-aligned openings; and forming individual drain contacts in the self-aligned openings that are electrically connected to corresponding semiconductor posts. |
地址 |
Boise ID US |