| 摘要 |
PROBLEM TO BE SOLVED: To suppress jitter of a clock signal.SOLUTION: A delay clock generation unit generates a predetermined number of delay clock signals, having delay times for a reference clock signal different from each other. A low speed clock generation unit generates a low speed clock signal having a frequency lower than that of a reference clock signal, in accordance with a control signal for controlling the phase. A control signal processing unit performs quantization for quantizing the values of control signals to a predetermined number of discrete values, and modulation for dispersing the quantization error in the quantization to a high frequency band higher than a predetermined frequency, for the control signal. A selection unit selects any one of the predetermined number of delay clock signals, according to the control signal subjected to quantization and modulation. An output unit outputs the low speed clock signal in synchronism with the delay clock signal thus selected. |
