发明名称 INTEGRATED CIRCUIT PACKAGE AND METHODS OF FORMING SAME
摘要 Disclosed is a method for forming an integrated circuit package. Multiple first stage stacks are mounted on a substrate, the substrate includes one or more contact pad corresponding to each first stage stack, and each first stage includes one or more probe pad related to each first stage stack. Each first stage stack is electrically tested for identifying a known good (KG) first stage stack and a known bad (KB) first stage stack. Multiple first stack substrates are mounted on the KG first stage stack, and accordingly multiple second stage stacks are formed. Each second stage stack is electrically tested for identifying a KG second stack and a KB second stage stack.
申请公布号 KR20150095553(A) 申请公布日期 2015.08.21
申请号 KR20140193572 申请日期 2014.12.30
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 YU CHEN HUA;WU CHI HSI;CHIOU WEN CHIH;LEE HSIANG FAN;TAI SHIH PENG;CHIU TANG JUNG
分类号 H01L25/065;H01L21/66;H01L23/488 主分类号 H01L25/065
代理机构 代理人
主权项
地址