发明名称 METHOD AND APPARATUS FOR ADDRESSING A MEMORY CONTAINING DIFFERENT BIT-LENGTH FIELD VARIABLES
摘要 A method of accessing a desired memory location applied in a cipher processing apparatus is disclosed. The cipher processing apparatus comprises a plurality of registers and a register storage. The method comprises the steps of: reading a cipher instruction comprising an opcode field and an operand specifier field; reading a base address from one of the plurality of registers according to a register-id sub-field; respectively reading a bit length and an index value from the register storage and an index sub-field; determining the desired memory location according to the base address, the bit length and the index value; and, accessing the desired memory location to obtain a desired field variable. Here, the operand specifier field comprises the register-id sub-field and the index sub-field.
申请公布号 US2015234750(A1) 申请公布日期 2015.08.20
申请号 US201414182938 申请日期 2014.02.18
申请人 ASPEED Technology Inc. 发明人 LU Chung-Yen;HUANG Hung-Ju
分类号 G06F12/14;H04L9/30 主分类号 G06F12/14
代理机构 代理人
主权项 1. A method of accessing a desired memory location applied in a cipher processing apparatus, wherein the cipher processing apparatus comprising a plurality of registers and a register storage, the method comprising: reading a cipher instruction comprising an opcode field and an operand specifier field, wherein the operand specifier field comprises a register-id sub-field and an index sub-field; reading a base address from one of the plurality of registers according to the register-id sub-field; respectively reading a bit length and an index value from the register storage and the index sub-field; determining the desired memory location according to the base address, the bit length and the index value; and accessing the desired memory location to obtain a desired field variable.
地址 Hsinchu City TW