发明名称 PROTECTION FOR ANALOG TO DIGITAL CONVERTERS
摘要 Systems and methods for protecting an analog-to-digital converter (ADC) are provided. The provided systems and methods utilize comparators in a circuit of a stage of the ADC to compare a reference signal to an input signal and output one or more maximum signals when the input signal exceeds the reference signal. A decoder in the stage of the ADC may output a reset signal to another circuit in the stage of the ADC when a predetermined number of the maximum signals are received. When the other circuit receives the reset signal, the ADC may enter a protection mode to protect the ADC by ensuring that the excessive input signal is not propagated to subsequent stages.
申请公布号 US2015236709(A1) 申请公布日期 2015.08.20
申请号 US201414183159 申请日期 2014.02.18
申请人 BOUVIER Stéphane;Dumont Sylvain;Rolindez Luis 发明人 BOUVIER Stéphane;Dumont Sylvain;Rolindez Luis
分类号 H03M1/10;H03M1/36;H03M1/46;H03M1/12 主分类号 H03M1/10
代理机构 代理人
主权项 1. A pipeline analog-to-digital converter, comprising: at least one stage receiving an input voltage and producing outputs of a residue voltage and a digital signal, the at least one stage comprising: a first circuit receiving the input voltage and producing an output of the digital signal and one or more maximum signal when the input voltage exceeds a reference voltage;a decoder coupled to the first circuit, the decoder configured to output a reset signal when a predetermined number of maximum signals are received; anda second circuit coupled to the decoder and the first circuit, the second circuit receiving the input voltage, the digital signal, and the reset signal when output, and configured to output the residue voltage, wherein the second circuit is configured to not output the residue voltage when the reset signal is output and received.
地址 Cairon FR