| 发明名称 |
Refresh, Run, Aggregate Decoder Recovery |
| 摘要 |
A data processing system includes a likelihood input operable to receive encoded data, a decoder operable to apply a decoding algorithm to likelihood values for the received encoded data and to yield a decoded output, and a decoder input initialization circuit operable to generate new decoder input values based in part on the likelihood values for the received encoded data after the likelihood values for the received encoded data have failed to converge in the decoder. |
| 申请公布号 |
US2015236726(A1) |
申请公布日期 |
2015.08.20 |
| 申请号 |
US201414218626 |
申请日期 |
2014.03.18 |
| 申请人 |
LSI Corporation |
发明人 |
Sankaranarayanan Sundararajan;Alhussien AbdelHakim S.;Haratsch Erich F.;Cohen Earl |
| 分类号 |
H03M13/45;H03M13/37 |
主分类号 |
H03M13/45 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A data processing system comprising:
a likelihood input operable to receive encoded data; a decoder operable to apply a decoding algorithm to likelihood values for the received encoded data and to yield a decoded output; and a decoder input initialization circuit operable to generate new decoder input values based in part on the likelihood values for the received encoded data after the likelihood values for the received encoded data have failed to converge in the decoder. |
| 地址 |
San Jose CA US |
