| 发明名称 |
Thread Optimized Multiprocessor Architecture |
| 摘要 |
In one aspect, the invention comprises a thread optimized multiprocessor prepared by a semiconductor manufacturing process, comprising the steps of: (a) interconnecting less than 4 layers of metal on at least one die; (b) embedding at least one processor in said at least one die; and (c) mounting said at least one die on a dual inline memory module. |
| 申请公布号 |
US2015234777(A1) |
申请公布日期 |
2015.08.20 |
| 申请号 |
US201414553262 |
申请日期 |
2014.11.25 |
| 申请人 |
Fish, III Russell H. |
发明人 |
Fish, III Russell H. |
| 分类号 |
G06F15/80;G06F13/28 |
主分类号 |
G06F15/80 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A thread optimized multiprocessor prepared by a semiconductor manufacturing process, comprising the steps of:
(a) interconnecting less than 16 layers of metal on at least one die; (b) embedding at least one processor in said at least one die; and (c) mounting said at least one die on a dual inline memory module. |
| 地址 |
Dallas TX US |
