发明名称 SEMICONDUCTOR LAMINATE, METHOD OF MANUFACTURING SEMICONDUCTOR LAMINATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor laminate, a method of manufacturing a semiconductor laminate, and a method of manufacturing a semiconductor device, capable of improving a yield in a manufacturing process of a semiconductor device consisting of a substrate consisting of a Group-III-V compound semiconductor, a buffer layer, and a quantum well layer.SOLUTION: A semiconductor laminate 10 comprises a substrate 20, a buffer layer 30, and a quantum well layer 40. A diameter of the substrate 20 is 55 mm or more, and at least one of a first element layer 41 and a second element layer 42 is formed of a mixed crystal configured by 3 or more elements. When a lattice constant of the substrate 20 is defined as d, and a lattice constant of the buffer layer 30 is defined as d, an average lattice constant of the quantum well layer 40 is defined as d, a value of (d-d)/dis -3×10or more and 3×10or less, and a value of (d-d)/dis -3×10or more and 3×10or less.
申请公布号 JP2015149335(A) 申请公布日期 2015.08.20
申请号 JP20140020199 申请日期 2014.02.05
申请人 SUMITOMO ELECTRIC IND LTD 发明人 AKITA KATSUSHI;FUJII KEI;KYONO TAKASHI;NISHIZUKA KOJI;SHIBATA KAORU
分类号 H01L21/20;C23C16/30;C30B29/40;H01L29/06;H01L31/10 主分类号 H01L21/20
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