摘要 |
The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a cover layer (2) arranged above the TSV at the main surface, a bump contact (6) arranged on the TSV at the further main surface, and a stress relief feature at the main surface or at the further main surface. The stress relief feature is provided to expose the TSV at least partially to the environment, which can be the ambient air, for instance, or any region of the device lying outside the region occupied by the TSV. The stress relief feature can be a channel (8) in an under-bump metallization (5). |