发明名称 |
INTEGRATED CIRCUIT WITH PROGRAMMABLE LOGIC ANALYZER, ENHANCED ANALYZING AND DEBUGGING CAPABILITIES AND METHOD |
摘要 |
<p>An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefore. In one embodiment, an integrated circuit includes a logic analyzer having a first input receiving a plurality of signals and an output for providing an indication of a detection, by the logic analyzer, of at least one trigger event; and a built in self test block having a first input for receiving one or more of the signals appearing at the first input of the logic analyzer, a second input coupled to the output of the logic analyzer for selectively enabling the BIST block, the BIST block generating and maintaining a signature based upon the first and second inputs thereof.</p> |
申请公布号 |
EP2614380(B1) |
申请公布日期 |
2015.08.19 |
申请号 |
EP20110824099 |
申请日期 |
2011.09.08 |
申请人 |
LEXMARK INTERNATIONAL, INC. |
发明人 |
BAILEY, JAMES, RAY;CASE, CHRISTOPHER, WILSON;SHARPE, JAMES, PATRICK |
分类号 |
G01R31/28;G01R31/3177;G06F11/22 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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