| 摘要 |
<p>A power semiconductor device (1), e.g. a power diode, and a method for producing such device is proposed. The device comprises a first layer (2) of a first conductivity type, a second layer (10) of a second conductivity type arranged in a central region (22) on a first main side (8) of the first layer (2), a third electrically conductive layer (16) arranged on the second layer (2) and a fourth electrically conductive layer (14) arranged on the first layer (2) at a second main side (12) opposite to the first main side (8). The device further comprises a junction termination region (24) surrounding the second layer (10) with self contained sub-regions (26) of the second conductivity type. Furthermore, a spacer region (42) is arranged between the second layer (10) and the junction termination region (24) and comprises a self-contained spacer sub-region (36) of the second conductivity type which is electrically disconnected from the second layer (10). This spacer sub-region (36) has a width enabling a reliable alignment of a shadow mask (40) during an ion implantation such that an implanted lifetime control region (34) comprising carrier lifetime reducing defects may be restricted to a central area (22) while no such defects are implanted into the junction termination region (24). Thereby, electrical characteristics such as a blocking capability of the diode are improved.</p> |
