Transistor characteristic calculation apparatus using large signal equivalent circuit model

摘要

A transistor characteristic calculation apparatus using a large signal equivalent circuit model has a buffer trap circuit provided between a drain terminal and a source terminal such that a parallel circuit including a resistor and a capacitor, a diode, and another parallel circuit including a resistor and a capacitor are in turn connected in series.

主权项

1. A transistor characteristic calculation apparatus using a large signal equivalent circuit model, comprising:
a gate-to-source capacitance connected between a gate terminal and a source terminal; a gate-to-drain capacitance connected between the gate terminal and a drain terminal; a parallel circuit connected between the drain terminal and the source terminal and including a transconductance, a drain conductance, and a drain-to-source capacitance; and a first trap circuit connected between the drain terminal and the source terminal, wherein the first trap circuit is configured such that a first parallel circuit including a first resistor and a first capacitor, a diode, and a second parallel circuit including a second resistor and a second capacitor are in turn connected in series.