发明名称 |
Methods of containing defects for non-silicon device engineering |
摘要 |
An apparatus including a device including a channel material having a first lattice structure on a well of a well material having a matched lattice structure in a buffer material having a second lattice structure that is different than the first lattice structure. A method including forming a trench in a buffer material; forming an n-type well material in the trench, the n-type well material having a lattice structure that is different than a lattice structure of the buffer material; and forming an n-type transistor. A system including a computer including a processor including complimentary metal oxide semiconductor circuitry including an n-type transistor including a channel material, the channel material having a first lattice structure on a well disposed in a buffer material having a second lattice structure that is different than the first lattice structure, the n-type transistor coupled to a p-type transistor. |
申请公布号 |
US9112028(B2) |
申请公布日期 |
2015.08.18 |
申请号 |
US201414263708 |
申请日期 |
2014.04.28 |
申请人 |
Intel Corporation |
发明人 |
Goel Niti;Pillarisetty Ravi;Mukherjee Niloy;Chau Robert S.;Rachmady Willy;Metz Matthew V.;Le Van H.;Kavalieros Jack T.;Radosavljevic Marko;Chu-Kung Benjamin;Dewey Gilbert;Sung Seung Hoon |
分类号 |
H01L21/02;H01L29/78;H01L21/84;H01L27/12;H01L21/8238;H01L27/092 |
主分类号 |
H01L21/02 |
代理机构 |
Blakely, Sokoloff, Taylor & Zafman LLP |
代理人 |
Blakely, Sokoloff, Taylor & Zafman LLP |
主权项 |
1. An apparatus comprising:
a semiconductor device comprising a channel material having a first lattice structure on a well of a well material having a matched lattice structure, the well disposed in a buffer material having a second lattice structure that is different than the first lattice structure, wherein the well comprises dimensions of a height greater than each of a width and a length. |
地址 |
Santa Clara CA US |