NMOS-offset canceling current-latched sense amplifier

摘要

A resistive memory sensing method includes sensing outputs of an offset-cancelling dual stage sensing circuit (OCDS-SC) by an NMOS offset-cancelling current latched sense amplifier circuit (NOC-CLSA). The NOC-CLSA is configured with a reduced input capacitance and a reduced offset voltage. Input transistors of the NOC-CLSA are coupled between latch circuitry and ground. A first phase output of the OCDS-SC is stored by the NOC-CLSA during a pre-charge step of the NOC-CLSA operation. A second phase output of the OCDS-SC is stored by the NOC-CLSA during an offset-cancelling step of the NOC-CLSA operation. By pipelining the OCDS-SC and NOC-CLSA, a sensing delay penalty of the OCDS-SC is overcome.

主权项

1. A sensing method in a sense amplifier circuit, comprising:
pre-charging a gate of a first input transistor and a gate of a second input transistor to a first fixed voltage node, the first input transistor coupled between a first latch transistor of a latch circuit and a second fixed voltage node, the second input transistor coupled between a second latch transistor of the latch circuit and the second fixed voltage node; discharging the gate of the first input transistor and the gate of the second input transistor; capturing a data voltage at the gate of the first input transistor; capturing a reference voltage at the gate of the second input transistor; coupling a first output node of the latch circuit to the first fixed voltage node and coupling a second output node of the latch circuit to the second fixed voltage node when the data voltage is greater than the reference voltage; and coupling the first output node of the latch circuit to the second fixed voltage node and coupling the second output node to the first fixed voltage node when the reference voltage is greater than the data voltage.